Senior and principal fpga engineers | Chandler, AZ

Detailed Information

  • Location: Chandler, AZ

responsible for the design and development of the company's products and systems. You will work on multidisciplinary project teams during initial feasibility, design and development, design transfer, and post release maintenance. Responsibilities include: Responsible for the design of embedded FPGAs Develop conceptual designs and perform trade studies Generate FPGA design requirements and architecture diagrams Develop HDL code and testbenches for FPGAs Perform design analysis that shows compliance to requirements and good design practices Bachelor's degree in Electrical Engineering or similar field; Master's degree is a plus 5-10+ years of Hardware Design experience 5-8+ years of FPGA design

experience with a wide range of electrical components Experience with FPGA design and testbench design Experience designing Digital memory controllers for Flash, SRAM, SDRAM, DDR2/3 Experience with board bring up and troubleshooting in the lab environment Experience collaborating across engineering disciplines Experience in highly regulated industries such as Aerospace, Avionics, Military, Semiconductor, Electronic Manufacturing, or others Strong verbal communicator and proficient at generating technical documentation System Verilog or OSVVM coding experience is a plus VHDL or Verilog experience is desired The pay range is the lowest to highest compensation we reasonably in good faith believe

we would pay at posting for this role.

We may ultimately pay more or less than this range.

Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future. We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law. This job is not eligible for bonuses, incentives or commissions. Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, interaction, pregnancy, interactionual orientation, gender identity, national origin, age, protected veteran status, or disability status.

For more details: jobs-search. org/architecture-construction_chandler-c424814/senior-and-principal-fpga-engineers-chandler_i1978286325

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