Location: Folsom, CA
Company: Intel
from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe available for customer globally and world class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IPs, along with ARM and RISC-V ecosystem IPs.
IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. IFS (CDE) Customer Design Enablement team is looking for a dynamic engineer who can design/validate high speed digital interfaces like UCIe, LPDDR, PCLe,
Protocol bridges (AXI/CFI/APB/PSF), NOC, HBI, FDI, etc. and collaborate with internal teams, document micro-architecture and implement the design using System Verilog.
In this role you will be actively involved in the hardware modelling and simulations, random and focused stimulus generation and coverage. Job responsibilities include but are not limited to: Microarchitecture design and documentation for So C or Subsystem development. Work on RTL coding, logic design. Participate in the verification of various IPs for various process technologies. Create verification test plan and participate in discussion across architect and design verification environment in UVM for pre-silicon. Participate
re-structure or create test benches in UVM or RAL Active involvement in hardware modeling and simulation, random and focused stimulus generation and functional coverage.
Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in computer engineering, Electrical Engineering, or a STEM related degree with master's degree in computer engineering, Electrical Engineering or a STEM related degree 5+ years of experience in one or more of the following: Expertise in Verilog/System Verilog, Lint /CDC/Synthesis/STA/Formal Equivalent etc.
Digital design or Computer architecture, or Object-Oriented Programming (OOP), or Design verification System Verilog OVM/UVM. Preferred Qualifications: Knowledge in ASIC validation methodology, Verilog testbenches, UVM and RAL. Experience in simulation/debug tools: VCS, Verdi. Demonstrate excellent communication, leadership and teamwork skills. Knowledge in Unix shell, Python and Perl scripting. Knowledge in Design For Test. Inside this Business Group Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs.
With the first " Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply. Other Locations US, OR, Hillsboro; US, TX, Austin; US, AZ, Phoenix; US, CA, San Jose Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, interaction, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, interactionual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $119,130.00-$178,690.00Salary range dependent on a number of factors including location and experience Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0250149pca3lyuhf
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