Location: Hillsboro, OR
Company: Intel
for tomorrow's technology and revel in the challenge that changing the world for the better brings. The focus of this role is to be part of a team of pre-silicon verification engineers to verify new and existing features for Intel's next generation CPU IP, resulting in bug free final design.
You will be responsible for exhaustively validating the RTL implementation of new architecture and micro-architecture capabilities using a combination of standalone and top-level test environments as well as formal verification. Responsibilities include, but are not limited to: Verification of a micro-architecture block, methodology, or otherwise significant aspect of CPU validation Collaborate with
architects, hardware engineers, and ucode engineers to understand the new features being implemented Read and interpret technical specs and create high quality technical documentation like test plans, strategy documents and coverage plans Plan and implement the UVM testbench, functional coverage model and assertions Developing validation content like tools, test generators to match the complexity of new cores and be reused in pre-si and post-si Participate in debugging failing verification tests to determine if the root cause is an error in the RTL, verification model, or the test.
Fix all identified failures in the verification model Investigating new techniques to accelerate validation
of CPU hardware In addition to the qualifications listed below, the ideal candidate will also demonstrate the following traits: Analytical thinking, problem-solving skills and excellent attention to detail Excellent comprehension and communication and interpersonal skills Ability to work in a fast-paced, multi-project team environment using state of the art tools and technology Qualifications You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Requirements Candidate must be pursuing a master's degree - OR - a Ph D degree in Electrical and Computer Engineering or any STEM related degree with 6+ months of knowledge or experience in one or more of the following: C/C++ and System Verilog, UVM verification environments ASIC/CPU verification Computer Architecture Digital Design Assembly languages Preferred Experience Projects or internship in ASIC/CPU verification and functional modeling Programming in C/C++ for modeling and assembly language programming Assertion and Functional Coverage Debugging RTL code using simulation tools Scripting languages like Python/Perl Inside this Business Group The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon.
If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, please join us. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.
Join us to do something wonderful! Other Locations US, Austin Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, interaction, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, interactionual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0253941pca3lyuhf
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